Page 18 - PEN eBook December 2022

Semiconductors DESIGN

In the circuit, the only additional element is the buffer Q1, which level-shifts the standard driver
U1 on-state output from +15 V for example, to +2 V supplied through a voltage regulator. The lower
MOSFET in Q1 is optional – the driver IC shown has an off-state output which could be used directly,

but the MOSFET in U1 gives increased current capacity, which could be useful with paralleled
devices. The Si-MOSFET in the dual gate part is controlled by another isolated driver. In the case
that the DC link is energized but the driver loses power, zener diodes D2 and D3 ensure that the
JFET reverts to cascode operation and remains off. Traditional DESAT detection is often included in
drivers, and this can be implemented with the JFET through R4 and D1 in the schematic.

CONCLUSION
To summarize, with little effort, a bond-wire change to the already-class-leading SiC JFET
stacked-chip cascode can be configured to extract all the advantages of a single SiC JFET: simple

switching speed control, even lower on-resistance, and much lower reverse-recovery charge, along
with the bonus feature of real-time temperature-sensing options. With this, the perfect switch gets
a little closer.

A Novel Efficient

Step-Down Converter

Design for Low-Power

Applications

By Stefano Lovati, technical writer for EEWeb

Low-power applications, such as wearables and smart devices, require efficient power-conversion
systems. In the case of ultra-low–power devices, with average load current of hundreds of microamps,
losses are mainly due to the control system, whose power absorption shall be minimized and adapted
References
to the load condition.

This article will propose an innovative control architecture that maximizes efficiency by achieving low

▶ www.unitedsic.com bias current (tens of nanoamps) and a frequency-dependent power consumption that is proportional
1
to the load demands. Read the original article here.
▶ www.unitedsic.com/application-notes
2
In ultra-low–power applications, each subsystem needs to be properly interfaced with the main battery
1
to reduce overall losses and maximize power adapting. 2

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