Page 40 - PEN Ebook May 2021

Semiconductors
Figure 2: fitted and measured CV characteristics.
JUNCTION CAPACITANCE
AND TRANSCONDUCTANCE
MODELING
C-V characteristic curves illustrate the Si based
device and SiC MOSFET nonlinearity of junction
capacitances. The curve fitting of the C-V charac-
teristics has the ability of interpreting the mod-
eling of these capacitances. Figure 2 shows the
comparison between the fitted and measured
C-V characteristic curves whereas Figure 3 shows
the comparison between the fitted and measured
I-V characteristic curves which allow the charac-
terization of transconductance.
Figure 4: Flow Chart of FSM.
40 MAY 2021 | www.powerelectronicsnews.com
Figure 3: fitted and measured IV characteristics.
MODELING OF SWITCHING
STATES WITH FSM
Interactions of the sub-stages in the process of
switching transient are illustrated by the adop-
tion of the FSM. Figure 4 shows the flow chart of
the FSM. Significant features of the FSM during
the Turn-on and Turn-off Transient are shown in
the Table 1 and Table 2 respectively.
SIMULATION AND EXPERIMENT
Simulation Environment
Output terminals (Vds, Vak, and Id) along with
the FSM in the half-bridge block have been con-
Table 1: features of FSM during Turn on state.
Table 2: features of FSM during Turn off state.
nected with the source that provides the voltage/
current that is necessary for achieving the con-
version between the signal interfaces and elec-
trical interfaces [14]. Table 3 shows the values of
the parasitic parameters.
Experiment Setup
Fig.5 shows the setup of the experiment. In this
experiment C3M0120090D and CVFD20065A
from Wolfspeed are chosen as the SiC MOSFET
and SiC SBD [14]. A double pulse signal has been
used to govern the gate drive that is generated
from the DSPc [14]. Lecroy Wave-Runner 8404-M
is used for obtaining the switching waveforms.
Voltage probe PPE2KV (2 kV, 400 MHz) is used to
measure the voltage of the drain source whereas
the drain current is measured with the help of
the scaled-down current transformer (CT) that is
Table 3: value of parasitic parameters.
Semiconductors
combined with a current probe
TCP312A (30 A, 100 MHz) [14].
Results and Analysis
The conditions that have been
used for this experiment were
vdc= 600 /400 V, iL=15 A, and
Rg (ex) varies from 10 to 47
Ω [14]. Calculation of the vds
involves the voltage drops on
them as the practical measure-
ment in the lead inductances
of the MOSFET (Ld and Ls).
From the simulation results
it can be clearly stated that
the analytical model can be used to assess the
switching characteristics of the SiC MOSFET. The
results have also shown that the high frequency
EMI can be reduced but at the cost of switching
loss [14].
CONCLUSION
Analytical modeling that is based on the FSM has
been elaborated for the evaluation of the switch-
ing characteristics in terms of transient response
speed, switching loss and HF EMI noise for SiC
MOSFET has been explained in this article. FSM
is used to model the switching transient analyt-
ically, it is responsible for the characterization
and analysis of each sub-stage in the transition
Figure 5: Experimental Setup.
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