Page 10 - PEN Ebook May 2021

Cover Story - Design
Figure 3: Commutation waveforms of the proposed solution.
As depicted in Figure 3, the pre-charge current
waveform has two peak pulses, the first one,
between t and t , is related to the charging of the
3
2
Q2 C OSS , and the second one (with a lower mag-
nitude) between t and t is due to the resonance
4
3
with the stray inductances of the pre-charge loop.
When the delayed PWM B signal finally reach-
es the gate of Q1 at t , the C OSS of Q2 is already
4
depleted with 20~24 V, which sets the stage for a
diode-to-switch smooth transition.
The pulse duration applied to the pre-charge
MOSFET Q4 goes beyond t when commutation
4
and transient events happen in both Q1 and Q2.
This is done intentionally to guarantee the proper
losses of the Si SJ MOSFET Q1 during turn-on. If
this pulse falls short, the possibility to have se- the corresponding C OSS . However, if the inductor
vere hard commutation is high in the Si SJ MOS-
FET, which would produce destructive results if
it occurs during long periods. Similarly, the LV
MOSFET could run continuously in avalanche.
10 MAY 2021 | www.powerelectronicsnews.com
Figure 4: Prototype of the 3.3 kW totem-pole PFC board implemented with
CoolMOS™ CFD7 and S7 SJ MOSFETs.
after t . For this case, the pulse applied to the
6
pre-charge MOSFET Q3 becomes effective and
causes the charge of Q1 C OSS to the depletion
voltage by the C HS_DP –Q3-D1-Q1 network. Once
Q2 is turned on, its drain-to-source voltage will
drop again close to zero, and a smooth transition
When the PWM B signal goes low, similarly as “switch to diode” is achieved without severe hard
before, due to the Ry-Cy network at the input switching.
of the gate driver of Q1, there is a certain delay
before the device entirely turns off at t . Due to
5
the load or inductor current, immediately after EXPERIMENTAL
the channel is completely closed, the C OSS of Q1 RESULTS ON
will be charged to 400 V, and the C OSS of Q2 will INFINEON’S DEMO
be discharged to 0 V producing a ZVS transition BOARD
for Q2. This is the case of the “switch to diode” The concept presented in this
transition in a PFC application. In this situation, article has been tested in a
the pre-charge circuit of the high-side switch 3.3 kW totem-pole bridgeless
Table 1: Infineon products used in the 3.3 kW totem-pole evaluation board with Si
(C HS_DP -Q3-D1) will not influence the operation of PFC, switching at 65 kHz and SJ CoolMOS™
the half-bridge with Si SJ MOSFETs. using SMD components.
This ZVS turn-on transition of the diode is pos- The demo board shown in Figure 4 is a system
sible when the load or inductor current is high solution from Infineon Technologies and imple-
enough to allow the charge and discharge of ments the power switches, diodes, drivers, and
controller presented in Table 1. The pre-charge
current at this transition is not enough to charge circuit has been designed according to [5], and
and discharge the C OSS of the half-bridge devic- it is implemented according to the design values
es, a hard-switching transition will happen. This compiled in Table 2.
situation is shown in Figure 3 as a dotted line
Cover Story - Design
Figures 5 and 6 show the effi-
ciency of the presented demo
board. The measured efficiency
includes the bias consumption
but not the power consumption
of the fan. Regarding the input
current performance, the pow-
er factor is over 0.95 when the
load is higher than 20 percent of
the nominal output power and
a THD under 5 percent for an
output power over 50 percent of
the nominal one. The maximum
efficiency is over 98.9 percent in
the range of 1000 W to 1500 W output power and
over 98 percent for the measured power range.
With the CoolMOS™ CCM totem-pole PFC solution,
the next level of silicon-based efficiency can be
reached, making it a cost-attractive alternative that
complements our powerful offering of wide-band-
gap solutions.
CONCLUSION
Using a simple and effective pre-charge circuit,
which allows the depletion of the Si SJ MOSFETs
and thus brings Q OSS and Q losses to a minimum,
rr
Infineon now enables the usage of Si SJ MOS-
FETs in CCM totem-pole PFC applications.
This article demonstrated the working principles
of this innovative concept and the experimental
MAY 2021 | www.powerelectronicsnews.com 11