Page 9 - PEN Ebook May 2021

Cover Story - Design Cover Story - Design

ductor connected to the switching node. However, At a given moment in time (t ), Q2 must be
0
when Q2 is turned off, the inductor current keeps switched off so the current will flow again
flowing through its body diode, and, when Q1 is through Q1 when turned on. After a certain delay
turned on, a hard-commutation of the body diode time (due to the R -C network at the input of
y
y
current occurs, leading to catastrophic results. By the gate driver of Q2), the gate-to-source volt-
applying the proposed solution, the Q is removed, age signal of Q2 also changes its state to off at
rr
and at the same time, the charge in the output t . During the mandatory dead time in any half-
1
capacitance (C OSS ) of Q2 Si SJ MOSFETs is consid- bridge (t -t ), the inductor current freewheels
2
1
erably reduced, and so its associated losses. through the body diode of Q2. During this time,
the switching node is clamped to the ground,

The included R -C and R -C filter networks at with voltage drop –V BD-Forward . Also, all the boot-
x
x
y
y
the driver inputs allow the proper timing of the strap capacitors, except for C HS_DP , for both driving
PWM signals to the half-bridge devices and the and depletion voltages are charged.
added LV switches; thus, no extra PWM signals
from the controller are required. Then, after the corresponding dead time, PWM B
is applied, and the CXRX network at the input of
The circuit diagram in Figure 2 depicts a typical the Q4 gate driver generates a pulse of a particu-

double-pulse test platform using the proposed lar duration. At t , the pre-charging MOSFET Q4 is
2
Figure 2: Circuit diagram of the proposed solution using CoolMOS™ in a half-bridge configuration. solution. This setup configuration reflects the turned on, and a pre-charge current (pre-charge I
same situation of “diode-to-switch transition” “diode”) circulates in the C LS_DP -Q4-D2-Q2 net-
To overcome these difficulties and make it pos- transition since those charges are provided from in the totem-pole PFC operating in CCM where work. The effective circulation of this current
sible to use Si SJ MOSFETs in half-bridge CCM a low voltage source. The result is a significant hard-commutation of the “diode mode” switch depends on the fact that the magnitude of such
operation, Infineon Technologies has developed reduction in the commutation losses in the Si SJ occurs every switching cycle. pre-charging current must be higher than the
and implemented an attractive and straightfor- MOSFETs. Also, continuous hard-commutation in freewheeling load current flowing through the
ward solution. The innovative prototype achieves the normal CCM operation of the totem-pole PFC body diode of the Si SJ MOSFET Q2. At the end
the highest efficiency in CCM totem-pole PFC is now feasible. HARD COMMUTATION of the pre-charge current (t ), the intrinsic body
3
topology at an attractive price-performance ratio. TRANSITION WITH THE diode of Q2 is deactivated, and the drain-to-
In the following sections, we present the working The proposed “pre-charge” solution requires a PROPOSED SOLUTION source voltage (V DS,Q2 ) is pre-charged to 24 V, thus
principles and the measured experimental results single high-voltage Schottky diode (D1 and D2 in Figure 3 presents the main waveforms happening bringing the following benefits:
of our system solution. Figure 2), a low voltage (LV) MOSFET (Q3 and Q4 during the commutation of a half-bridge imple-
in Figure 2), and a capacitor (C HS_DP and C LS_DP ) per menting Si SJ MOSFETs Q1 and Q2. For readers’ ▶ This pre-charge voltage brings the half-
power device in the half-bridge, as well as two convenience, the time axis showing the transi- bridge capacitance closer to the knee of the
HIGH-FREQUENCY HALF-BRIDGE supply voltages, for driving the LV MOSFET and tions that occur at the different PWM events is non-linear C OSS curve (Figure 1).
OPERATION PRINCIPLE WITH SI providing the pre-charge voltage. The solution also not in scale.
SJ MOSFETS implements a level-shifting (bootstrap capacitors) ▶ The commutation losses at this point are

With the proposed solution, the C OSS capacitance technique, with traditional drivers for both the In a previous state than t , the inductor was en- considerably lower than in the point where
0
of the freewheeling or “diode mode” (Q2 in Figure driver supply and the depletion voltage (highlight- ergized through Q1, which would implement the the drain-to-source voltage is negative or
2) Si SJ MOSFET is pre-charged at a certain level, ed in orange and grey, respectively, in Figure 2). switch function in a totem-pole PFC. Once Q1 is close to zero. Without the pre-charging,
e.g., 24 V (Figure 1). This pre-charging drastically turned off, the inductor current flows through the losses would include the body diode Q
rr
reduces the losses associated with its output ca- In the half-bridge configuration of Figure 2, Q2 Q2, first through its body diode and then through losses and the very large output capacitance
pacitance charge (Q OSS ) and the reverse recovery typically turns on with soft-switching after Q1 the channel of the device, once Q2 is turned on. associated Q OSS losses of Q2.
charge (Q ) of its body diode during the turn-off turns off, given the energy accumulated in the in-
rr
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