Page 52 - PEN Ebook March 2021
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Semiconductors                                                                                                                                                                                             Semiconductors


                                                               GaN and copper clip create a technology mix for

                                                               650 V high-power FETs when it comes to heat
                                                               capacity and thermal conductivity.


                                                               From simulations described in figure 4, the engi-
                                                               neers have estimated a Rth of just 0.173 °C/W for
                                                               CCPAK in comparison with 0.7 °C/W of TO-247.


                                                               Whether it is the AC/DC PFC stage, a DC/DC
                                                               converter, or traction inverter, the basic building

                                                               block for most topologies is a half-bridge. Hence,
                                                               when GaN FETs are compared against Si FETs
                                                               in a simple boost converter, the GaN technology
                                                               shows its superior performance.

          Figure 3: Self inductance @ frequency 100 MHz.
                                                               Nexperia’s top-side cooled GAN039-650NTB is
          THERMAL PERFORMANCE AND                              a solution used in a half-bridge demonstration                    Figure 5: Half bridge demo efficiency.
          HALF-BRIDGE ADVANTAGES                               board – 400 VIN and 230 VOUT at 100 kHz with

          Thermal management has long been a design            57.4% duty configuration operating at an ambient
          challenge for power applications. When designs       temperature of 23.1 °C.
          had space for large bulky heatsinks it was rel-
          atively easy to draw heat away from the circuit      In a 400 VDC buck-mode set-up with a low-side
          board and semiconductor components. Howev-           VDS for ID of 20 A, the spike, overshoot and ring-
          er, as power levels and both power and circuit       ing are almost negligible during both the turn-on
          density have increased, this has become more         and turn-off. This provides a t advantage in terms
          difficult to handle.                                 of noise and any silicon related Qrr issues, and

                                                               efficiency results of 99%.


                                                                                                                                 Figure 6: CCPAK1212 switching waveform.









                                                                                                                                 For More Information





                                                                                                                                        ▶ Next generation HV power GaN technology and the benefits of copper-clip SMD
                                                                                                                                       packaging (CCPAK), Dr. Dilder Chowdhury, Talk at Power Electronics Forum



                                                                                                                                        ▶ Nexperia

          Figure 4: Thermal simulation power GaN FET.

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