Page 43 - EE Times Europe March 2022

EE|Times EUROPE 43

NEUROMORPHIC COMPUTING
Inference Sensing and In-Memory Computing

Chip Startup Claims 20 TOPS/W

By Steve Gu

eexen, an inference sensing and in-memory computing startup of bandwidth and latency. This problem is particularly prominent in
based in Shenzhen, Shanghai, and Chengdu, China, and in edge computing scenarios such as AR/VR and autonomous driving,
Zurich, develops ultra-low–power audio and visual signal- which require high bandwidth and near-real–time performance.
Rprocessing chips based on its inference sensing and in- The “memory and computing integrated” architecture that has
memory computing architecture and has penetrated the markets for emerged in recent years essentially integrates memory and com-
true wireless stereo (TWS) headsets puting units more closely to reduce unnecessary latency and energy
and other wearables. The startup consumption caused by data transfer. For IoT and edge comput-
targets AR/VR/XR, AIoT, and auton- ing applications, meanwhile, smart sensors are required to gather
omous driving applications in which information from the physical world. Because sensing, memory, and
its high-efficiency chips will meet computing are essential components of smart IoT devices, adding
strong demand. sensing on top of memory and computing makes sense to get better
In July 2021, Reexen secured about performance, power consumption, and area (PPA).
€15 million in a Series A round led Reexen’s technology is based on neuromorphic computing con-
by Inno-Chip (an investment firm cepts. Its founders were Ph.D. students under ETH Zurich professor
of Omnivision, the largest fabless Tobi Delbrück, a pioneering researcher in the field of neural
company in China), Spinnotec, and perception computing and dynamic vision. Reexen developed the
Miracleplus. It has also received neural perception computing theory into analog preprocessing and
R&D funding as part of two in-memory computing technologies, progressing beyond visual pro-
European Union AI collaborative cessing to a variety of sensor-fusion applications.
projects, and it plans to expand its Reexen’s Hongjie Liu Reexen’s CEO told EE Times China that its architecture consists
European R&D center in 2022. of two parts: analog preprocessing (ASP) and analog/mixed-signal
Hongjie Liu, co-founder and CEO of Reexen, explained the com- computing in-memory (CIM) (Figure 1).
pany’s integrated sensing and mixed-signal in-memory computing The front-end ASP directly extracts signal characteristics from the
architecture in a recent interview with EE Times China. original data to reduce information redundancy, thereby achieving
a higher level of effective information extraction. The traditional
INFERENCE SENSING AND IN-MEMORY COMPUTING signal-perception process requires an analog front end (AFE) for
In traditional computing based on von Neumann architecture, the com- processing, then conversion into digital signals by an ADC and pro-
puting power of the processor is limited by the memory unit in terms cessing by a DSP. Analog preprocessing, however, can directly extract

Figure 1: ASP and CIM are two key parts of Reexen’s integrated architecture. (Source: Reexen)

www.eetimes.eu | MARCH 2022