Page 35 - EE Times Europe March 2022

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Wide-Bandgap Semiconductors: The Next Wave of GaN and SiC

2.6-gigaton-per-year reduction by 2050.” in favor of devices that have integrated power density, it is allowing us to have
GaN power device manufacturers agree functions on board, said Lidow. “For GaN, it’s lower system cost.
that the move from discrete GaN to higher about integration going forward.” “We’re about 50% higher in power den-
integration will drive increased efficiency. sities — so again, smaller, lighter, cooler
Both Navitas and EPC discussed their SiC: ADVANCES AND SAVINGS — and we’re able to show about a net system
integrated GaN products, which deliver on The benefits of SiC power devices are higher cost benefit of 18%,” he added.
improved efficiency, smaller size, and greater efficiency and higher switching frequen- For UnitedSiC, a big part of its strategy
power output. cies. Those features translate into smaller is delivering low R DS(on) . Losee devoted a
One example is Navitas’s GaNFast power system devices, higher power density, and portion of his discussion to the company’s
IC, offering an integrated gate drive with lower system cost. In addition, the higher 750-V Gen 4 product series with 6-mΩ SiC
GaNSense technology that integrates auton- switching frequencies are said to reduce the FETs. Compared with a 650-V SiC MOSFET,
omous sensing and protection circuits. size of passive components. the Gen 4 750-V FETs offer 3× lower on-
The beauty of GaN is the integration of Both Wolfspeed and UnitedSiC discussed resistance per unit area.
high-voltage, high-power, low-voltage, the significant volume growth in the SiC It’s about achieving the lowest R DS(on) per
digital-logic, and other devices on the same market along with their latest product unit area by leveraging a normally on, very
chip, said EPC’s Lidow. “The advantage of introductions. low-on-resistance SiC JFET with a low-
GaN is that it is extremely fast, and if you A key part of Kierstead’s discussion cen- voltage Si MOSFET, said Losee.
put a driver right on the same chip as the tered on Wolfspeed’s SiC devices, which are The company takes a slightly different
power device, you can get much higher driving a change in renewable energy power approach to the SiC FET design, using
speed than if they’re in two different chips. conversion and storage. cascode technology based on the SiC JFET.
You also get advantages in terms of power A key advantage of Wolfspeed’s portfolio, A key benefit cited compared with a
efficiency.” as he sees it, is that the company covers standard SiC FET is the JFET’s superior
A few years ago, EPC introduced its fully applications from 6 kW to 22 kW on the transconductance and good I dsat character-
monolithic power stage, which delivered charger side, which has been extended into istics, which allow UnitedSiC to tune for
much greater efficiency and greater power the solar-based energy storage system (ESS) short-circuit performance without large
output. It also translated into a smaller size, market. compromises in on-resistance under their
fewer components, and less design time. “The benefits are certainly higher nominal condition.
EPC expects to take the technology to a efficiency,” he said. “We can get higher UnitedSiC also offers greater design flex-
higher level of integration, and by the switching frequencies. All of this drives ibility with wider option ranges — in this
2023–2024 timeframe, discrete power smaller, lighter, system-level devices with case, an expansive portfolio from 6 mΩ to
devices will start to fade out of EPC’s toolbox better efficiencies, and along with the 60 mΩ with the 750-V FET.

Industry’s Lowest R DS,On FETs 650V SiC MOSFETs

27mΩ Lower conduction
losses across
temperature
750V UJ4C/UJ4SC FETs
18mΩ 17mΩ
15mΩ 13.5mΩ
12mΩ NEW

6mΩ

Comp 1 Comp 2 Comp 3 Comp 4 Comp 5 RDS(on) = 25˚C (typ) Comp 5
650V Based on published datasheets 7/21 750V
*TO247-3L, **TO247-4L
UnitedSiC FETs’ best R DS,On x A allow lowest on-resistance discrete

© 2021 Qorvo US, Inc.
2

UnitedSiC claims the 750-V, 6-mΩ SiC FETs offer an R value of less than half that of the nearest SiC MOSFET competitor.
DS(on)
(Source: UnitedSiC)

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