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           Innatera Unveils Neuromorphic AI Chip to Accelerate Spiking Networks


                                                                 APPLICATION-SPECIFIC
                                                                 Innatera, a spin-out from the Delft University of Technology, was
                                                                 already working with revenue customers on its SNN algorithms before
                                                                 moving into hardware and raising a seed round of €5 million (about
                                                                 US$6 million) toward the end of 2020.
                                                                   “We’ve been working with a number of customers since the time we
                                                                 actually started the company, and these engagements are still ongoing
                                                                 — they’ve matured very significantly,” Kumar said. “We hope to be able
                                                                 to show more demonstrations together with some of these customers
                                                                 in the later part of this year.”
                                                                   Kumar said the company maintains its focus as a compute solutions
                                                                 company; that is, it will supply turnkey solutions that include both
                                                                 hardware and application-specific SNN algorithms.
                                                                   Innatera’s first chip is suitable for audio, health, and radar applica-
           Innatera’s spiking neural processor includes a massively parallel   tions. The company’s roadmap could include further-optimized chips
           neuro-synaptic array and spike encoders and decoders.   for each of the applications.
           (Source: Innatera)


             The second reason is to optimize performance. Rather than represent
           information as bits in words, in an SNN, information is represented as
           precisely timed spikes. The timing of the spikes needs to be manipu-
           lated at a very fine-grained level to extract insights about the data. The
           neurons and the connections between them (the synapses) therefore
           need to exhibit complex timing behaviors. Those behaviors can be
           adjusted via Innatera’s SDK to optimize performance.
             Innatera describes its chip as analog-mixed signal or “digitally
           assisted analog.” Neurons and synapses are implemented in analog
           silicon to maintain ultra-low power consumption. Analog electron-
           ics also allow continuous time networks (digital electronics would
                                     require discretization). This is
                                     important to SNNs because they
                                     inherently have a notion of time
                                     and must be able to hold partic-
                                     ular states over a period of time.
                                       “Doing this is much easier in
                                     the analog domain — you don’t
                                     have to shift the complexity of
                                     keeping state into the network
                                     topology,” Kumar said. “Our com-
                                     pute elements naturally retain
                                     that state information. This is
                                     the reason we do things in the
                                     analog domain.”
                                       Minor inconsistencies in   A compute segment in Innatera’s array, where the neurons are
           Innatera’s Sumeet Kumar   fabrication between compute   designed to be carefully matched. Programmable synapses are
                                     elements on the chip, and   arranged in a multi-level crossbar structure. (Black lines/dashes
           between different chips, can be a problem for implementing neural   here represent input and output spikes.) (Source: Innatera)
           networks accurately in the analog domain. Innatera’s solution
           is to group neurons into what it calls segments, which are carefully
           designed to match path lengths and numbers of neurons.  “We architected the device in such a way so that we could
             The segment design “essentially allows us to use the best of   accelerate a wide variety of spiking neural networks,” Kumar said.
           analog circuitry while minimizing these non-idealities that you   “[Our chip] can implement these networks across application domains.
           would typically have in an analog circuit,” Kumar said. “All of this   But as we go deeper into domains, it may be necessary to optimize the
           was essentially done to make sure that neurons inside a segment   hardware design, and this is something which we will look at in the
           exhibit deterministic behavior and that they function in a way that   future. Right now, the hardware is not overly specialized toward any
           is similar to their immediate neighbors.”             specific class of applications or any style of spiking neural networks. The
             Inconsistencies between chips can cause problems when the same   aim is to support a variety of them generally inside the architecture.”
           trained network is rolled out to devices in the field. Innatera gets   Samples of the initial chip are on track to become available before
           around this with software.                            the end of 2021. ■
             “Mismatch and variability are dealt with deep inside the SDK,”
           Kumar said. “If you are a power user, we can expose some of that to   Sally Ward-Foxton is editor-in-chief of EE Times Weekend. This article
           you, but a typical programmer doesn’t need to bother about it.”  originally appeared on EE Times.



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